6. Power Management
The MicroEJ Platform for MIMXRT595-EVK has been optimized to consume the less possible energy when the MicroEJ application is in pause. In other words, as soon as the MicroEJ application is not doing any work (drawings, calculations, etc.), the MicroEJ Platform puts the system in the deepest low power mode.
The power optimizations only concern the MCU consumption. External peripherals like the display have not been managed and may keep consuming power when the MCU is sleeping.
6.1. Power Modes
i.MX RT595 provides several power optimization modes: Active, Sleep, Deep sleep, Deep power-down, and Full deep power-down. The MicroEJ Platform for MIMXRT595-EVK is using the Deep sleep mode. This mode considers:
- To statically power off the peripherals that are never used (including never used memory banks),
- To switch to Sleep when RTOS is idle,
- To configure which peripherals and memory banks have to be maintained active during deep sleep,
- To determine the wake-up source(s),
- To reduce external PMIC VDDCORE voltage level while in Deep sleep mode.
Power optimizations are integrated into FreeRTOS by using the
tickless idle mode (see https://www.freertos.org/low-power-tickless-rtos.html).
In this mode, FreeRTOS idle task can stop the tick interrupt and place the system in sleep mode. The tick interrupt is stopped for an estimated
idle time that corresponds to the time to the next programmed event (e.g., time of the next programmed timer).
According to that estimated idle time and the power management context, the system is placed in Active, Sleep, or Deep sleep modes.
- in Active mode, the tick interrupt is not suspended, and the system is kept alive. This mode is selected when the low power feature is disabled.
- in Sleep mode, the tick interrupt is suspended, and the system enters in standard sleep mode. No peripheral is switched off, and the external PMIC keeps the VDDCORE unchanged. This mode is selected if some system peripherals manage tasks (i.e., GPU computation, FrameBuffer DMA transfer, etc.).
- in Deep sleep mode, the tick interrupt is suspended, and the system enters in deep sleep mode. Memory banks are partially switched off (data is still retained), clocks are stopped, the system is clocked on a low-power clock, and the external PMIC automatically switches to provide a lower VDDCORE.
In Sleep and Deep sleep modes, the system can be waked up by the buttons, capacitive screen touch, or an internal counter interrupt (that will trigger once the estimated idle time is reached).
Initiating a debugger connection in Deep sleep mode is impossible; thus, detecting a debugger connection has been wired as a wake-up source. This brings the limitation that in debug mode, the system will not enter Deep Sleep mode but only Sleep mode when the FreeRTOS is in the idle task.
The existing application provides four watchfaces. The Sport, Simple, and Flower watchfaces continuously update the watch screen, and the system never enters in
tickless idle mode (continuous animation).
The FlowerLP watchface has been developed only to refresh the screen every second. This watchface can be used to observe the impact of the
tickless idle mode on power consumption.
The following chart displays the current consumption and voltage on VDDCORE while switching from the Flower watchface to the FlowerLP watchface.
The chart shows the general trend. The power consumption was measured on a particular MIMXRT595-EVK board; it may differ between several boards. Please refer to NXP i.MX RT595 Electrical Characteristics for further information on power consumption figures.
6.4. Reduce Power Consumption
The MicroEJ VEE RT500 provides different ways to reduce global power consumption with three different targets:
- Reducing Active mode power consumption (powering on only what is needed by the application).
- Reducing processing time (using the hardware capabilities efficiently).
- Reducing Deep sleep mode power consumption (reducing the number of powered hardware elements).
These different ways are described in the subsequent chapters. Some are application dependent, and others are already integrated into the MICROEJ Platform.
6.4.2. Performance Profiles
The clock frequency and the VDDCORE power supply can be tuned to reduce the system power consumption. However, this tuning brings a performance drawback because it reduces the number of frames per second that can be sent to the display.
As all watchfaces don’t need the same performance/power consumption configuration level, the concept of the performance profile is introduced:
- A performance profile is a BSP configuration selectable by the MicroEJ Application and providing the best execution configuration for that application.
- A performance profile can also switch on/off some services of the MicroEJ Application (i.e., step service, activity service …)
Currently, two performances profiles are available: MAX_PERFS and POWER_SAVING:
|CPU Clock Frequency||192Mhz||96Mhz|
|MIPI Clock Frequency||230Mhz||345Mhz|
|Feature Loader RAMs||ON||OFF (1)|
(1): Feature deployment is not available in POWER_SAVING performance profile.
POWER_SAVING performance profile has an impact on both the three power consumption reduction targets:
- It reduces Active mode power consumption with the leverage of VDDCORE.
- It reduces the processing time as the framebuffer transfer to the display is quicker with the increase of the MIPI clock frequency.
- It reduces the Deep sleep mode power consumption as the Feature Loader RAM is powered off.
The application code makes the performance profile selection with
PowerManagementHelper.setPerfProfile(int profile) method.
Refer to the FlowerLP watchface code for an example.
profile argument can be either
The definition and configuration of the different performance profiles are hardcoded in the BSP code.
The Clipping feature usage reduces the global consumption of an application with an impact on the processing time:
- It reduces the drawing time.
- It reduces the number of lines transmitted to the display device.
The time spent in Deep sleep mode is increased, and the IOs power consumption is reduced.
Using the Clipping feature is a choice of the application developer but the automatic transmission of only the clipped lines is integrated into the BSP code.
Refer to the FlowerLP watchface code that uses this feature. Only a rectangle containing the second hand is refreshed every second. The whole screen, including hour and minute hands, is refreshed every minute.
6.4.4. RAM buffers
The i.MX RT595 RAM is split into a set of independently powered RAM partitions. The MicroEJ Platform optimizes the RAM partitions powering them off when possible:
- Framebuffer 0/1: automatically and alternatively powered OFF when they don’t need to be retained in Deep sleep mode.
- Feature Loader buffer: powered OFF in POWER_SAVING performance profile.
- Kernel Feature buffer: powered OFF at startup and will only be powered ON if KF needs to install a new feature.
This reduces the Deep sleep mode power consumption and is integrated into the BSP code.
This feature requires that Framebuffer 0, Framebuffer 1, Feature Loader buffer, Kernel Feature buffer, and the Data RAM section are linked to individual RAM partitions.
6.5.1. Board Rev. C1
Board Rev. C1 behaves the same way as the Board Rev. D with some automatic adjustments in the BSP code:
- Pullups added on some pads to reduce leakage current.
- Control of PIO4_0 to select VDDIO_2 voltage level.