1. Introduction

1.1. Overview

This is the documentation of the Cinterion VEE 1.8.1.

It describes the content of the evaluation package, guides the evaluation (setup, demo, …) and documents how to extend it for a specific application.

This section provides an overview of the package. Section Getting Started helps to set up a development environment and run the demo. Then, Application Documentation, Kernel Documentation and VEE Port Documentation document how to create/extend respectively a MicroEJ Application, a MicroEJ Kernel and the Cinterion VEE Port.

Note

This package is intended for evaluation only. Included Cinterion VEE Port is usable for production.

1.2. Requirements

  • Compatible Operating Systems : Windows ( tested on Windows 10 ) or Linux ( tested on Ubuntu 20.04 ) only.

  • MICROEJ SDK 5.4.0 (as provided by the MICROEJ SDK Dist. 21.03).

  • Cinterion® IoT SDK v00.02.005 for embedded processing.

    • Requires a Python 2.7 installation.

  • Cinterion® LGA DevKit (Small socket footprint) + EXS82 module

    or Cinterion® LGA DevKit (Large socket footprint) + PLS63 module.

    • The development kit contains a wideband antenna for LTE networks.
    • The development kit does not contain a GPS antenna: it is optional for the demo.
    • The development kit does not contain a second USB cable for the ASC0 serial interface: required for running applications on the simulator.

This package has been tested on:

  • MICROEJ SDK 5.4.1.
  • PLS63:
    • Cinterion® IoT SDK v00.02.005, PLS63 firmware rev 02.000 / arn 01.000.00.
    • Cinterion® LGA DevKit (Large socket footprint) + PLS63-EP B2.3.

1.3. Package Structure

The Cinterion VEE Evaluation Package 1.8.1 is available on request (contact us), it contains:

  • Cinterion-Platform-Clangv4_cortexa7-<version>.zip: this package contains the sources of the Cinterion Platform.
  • cinterion-offline-repository-<version>.zip: this package contains all the modules required to build the packaged sources.
  • cinterion-demo-kernel-<version>.zip: this package contains the sources of the demonstration multi-sandbox kernel.
  • cinterion-demo-application-<version>.zip: this package contains the MQTT-based demonstration application.
  • config/: this folder contains configuration files to upload to the Cinterion file system for the demonstration.
  • binaries/: this folder contains the prebuilt binaries of the demonstration.
  • platform-mock-<version>/: this folder contains the hardware mock controller binary to run the demonstration in simulation.

1.4. Support

For the Cinterion® IoT SDK and LGA DevKit requests, as well as technical support regarding the EXS82 and PLS63 modules and the Cinterion® IoT SDK, please contact Telit.

To build applications with the MICROEJ SDK, a license is required. To get an evaluation license, follow instructions here: Evaluation Licenses. To request a production license, please contact sales@microej.com.

For support on this package and on the MICROEJ SDK, please contact support@microej.com.

1.5. Telit contact

For any questions on Telit Cinterion® product ordering or technical support requests, please contact Telit Support.

1.6. External resources

Regarding the Cinterion® hardware and software, please refer to the documentation of the Cinterion® IoT SDK.

Regarding the MICROEJ SDK:

1.7. Hardware description

Cinterion Modules EXS82 PLS63
LTE technology LTE-M / NB / 2G* LTE Cat.1 / LTE Cat.4**
MCU ARM Cortex A7, up to 800 MHz ARM Cortex A7, up to 1.3 GHz
Flash File System 2 MB 11 MB
RAM DAM app memory space 512 kB 16 MB
Code execution in RAM yes yes

* 2G fallback is used to cover scenarios where LTE Cat.1, LTE-M and/or NB-IoT are not yet available.

** High-Speed LTE: Global and multiple Regional variants with latest network bands grouping.

1.8. Known issues and Limitations

  • The current package has not been tested on the EXS82 module.
  • The device serial communication is limited (output is working but not input).
    • This is a limitation for the simulator: Cinterion APIs mocking is unsupported.
  • The GPS features have not been fully tested.
  • The VEE Port known issues / limitations are listed in its release notes.
  • The memory available for application on EXS82 and PLS63:
Cinterion Modules EXS82 PLS63
RAM DAM app Memory Space* 512 kB 16 MB
BSP + MicroEJ VEE core footprint ~ 310 kB ~ 3800 kB
Available memory for Application: RAM + ROM ~ 200 kB ~ 12600 kB

* Minimum available as defined in the datasheet, specific firmware versions may allow for more.